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蒙纳什大学马来西亚校区 / 课程

ECE5063

Integrated circuit design

6 credit pointsLevel 5First semesterMalaysiaMalaysia School of Engineering

基本信息

学分6 credit points
开课学期First semester
校区Malaysia
考核构成
Workshop activities10%
Laboratory activities35%
Mid-semester test15%
Project40%

开课安排1

教学期授课方式状态
First semesterTeaching activities are on-campus (ON-CAMPUS)开课

以上为该校区在官方资料中登记的全部开课安排,不是汇总。同一门课可能在多个 教学期开课,也可能不同教学期的授课方式不同。

课程简介

This unit helps you build a solid understanding of the performance, specification, and fabrication of large-scale digital circuits, including MOS transistor principles, CMOS inverters, building blocks, and interconnects. You’ll explore how to design, simulate, verify, and debug complex digital circuits using a Hardware Description Language (HDL) and current CAD tools with FPGA development boards. You’ll also become familiar with very large-scale integrated (VLSI) circuit design flow methodologies, including layout placement, partitioning, floor planning, and routing.

以上为 Monash Handbook 的官方原文,版权属 Monash University,此处按本站要求转载并标注出处: 官方页面 ↗

学习成果5

官方原文(Learning outcomes),版权属 Monash University。

  1. ULO1 Discuss and evaluate the design process of IC circuits in the semiconductor industry.
  2. ULO2 Apply and analyse the principles of CMOS Digital Circuits in case studies and problems.
  3. ULO3 Construct a CMOS layout and assess the design in terms of speed, power and area.
  4. ULO4 Analyse and evaluate the delay in multiple paths of a VLSI design.
  5. ULO5 Design a customised IC circuit based on an industrial design case study and perform full verification on the design for manufacturability.

教学方式与预期工作量

教学方式

Problem-based learning - This unit includes case-based teaching, where you will apply your knowledge and engage in analytical and reflective thinking to solve complex contextual scenarios. Activities are often designed so that there is no single clear answer, but you will work with your peers to examine, analyse and make decisions to resolve the situation.

预期工作量

The minimum total expected workload to achieve the learning outcomes for this unit is 144 hours per semester typically comprising a mixture of 3-6 hours of scheduled learning activities and 6-9 hours of independent study per week. Scheduled activities may include a combination of teacher-directed learning, peer-directed learning and online engagement. Independent study may include associated readings, assessment and preparation for scheduled activities

官方原文,版权属 Monash University。

先修 / 同修要求

官方资料未列出该课程的先修要求。

先修链路

官方资料未列出该课程的先修要求,因此没有链路可画。

互斥课程1

这些课和本课内容重叠,不能同时算进同一个学位(官方目录的 Prohibition 字段)。选了其中一门,另一门通常只能算选修学分甚至完全不计—— 这跟先修不同,先修是"没修过就不能选",互斥是"修了也不能两门都算"。

ECE4063Integrated circuit design

原始记号:ECE4063

属于这些学位1

这门课出现在下列学位的官方结构里。反过来说:如果你读的是这些学位之一,它大概率是要修的 (必修还是选修取决于它在 Part 里的位置,点进去看结构)。

数据来源

数据来源
官方网页
handbook.monash.edu
抓取时间
2026-09-13
可信度
程序抓取,未人工核实

查看官方完整描述 ↗ — 事实性字段(代码、学分、教学期、授课方式、考核权重、先修/同修/互斥关系)与 课程简介、学习成果、教学方式、预期工作量均取自官方 Handbook; 正文版权属 Monash University,此处转载并逐处标注出处。

发现信息有误?告诉我们。请用自己的话描述问题,不要上传成绩单、截图或校内系统文件

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